1. Technical Field
The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device having a trench gate electrode.
2. Related Art
A power metal oxide semiconductor field effect transistor (MOSFET) of a trench gate type has the advantage of miniaturization of a transistor cell. Japanese Unexamined patent publication No. 2000-31484, and its patent family U.S. Pat. No. 6,204,533 B1 disclose a vertical type power MOSFET having a plurality of gate portions 304A and 304B which are parallel and elongated stripe shapes as shown in FIGS. 1A and 1B.
As shown in FIG. 1A, a known vertical type power MOSFET includes an N+ substrate 300, an N type epitaxial layer 302 formed on the N+ substrate 300 and a P− body region 310, an N+ source region 308, and a P+ body contact region 316 formed between the gate portions 304A and 304B. With this structure, stripe shaped cells are formed.
As shown in FIG. 1B, a plurality of the P+ body contact regions 316 are formed at intervals along the stripe shaped cells in order to suppress resistant loss of the P− body region 310 and voltage drop associated therewith. The portion surrounded by the dotted line in FIG. 1B corresponds to the portion shown in FIG. 1A.
Further, the known semiconductor device has a P+ region 317 just beneath the N+ source region 308 in order to further reduce the voltage drop of the P− body region 310. The P+ region 317 is formed so as not to reach the N type epitaxial layer 302. The P+ region 317 is formed by ion implantation of impurities with high energy at just beneath the N+ source region 308 after forming the N+ source region 308; or, the P+ region 317 is formed by ion implantation of impurities with low energy in the P− body region 310 before forming the N+ source region 308.